The invention relates to random access memory. More specifically, the invention relates to a non-volatile ferroelectric random access memory device.
Ferroelectric random access memory ("FeRAM") is a type of non-volatile memory that is being considered for use in computers. Near-term goals for FeRAM include using it to replace flash memory in computers. As with flash memory, FeRAM is non-volatile. However, FeRAM is less expensive than flash memory and it operates at lower voltages. Additionally, FeRAM is much faster than flash memory. Whereas flash type EEPROM cells can take microseconds to write and milliseconds to erase, FeRAM devices can take only nanoseconds to read and write. In fact, access times of FeRAM rival those of dynamic random access memory and static random access memory.
An FeRAM device includes an array of memory cells. A typical memory cell includes a single ferroelectric capacitor and a single access transistor. The ferroelectric capacitor has two stable polarization states, which correspond to binary levels. Moreover, the ferroelectric capacitor retains its state without electric power.
A typical FeRAM device also includes a word line for each row of the memory cell array, a bit line for each column of the memory cell array, and a plate line that is common to all of the memory cells in the array. In each memory cell, a gate of the access transistor is connected to a corresponding word line, a drain-source path of the access transistor is connected between the ferroelectric capacitor and a corresponding bit line, and the ferroelectric capacitor is connected between the transistor drain-source path and the common plate line.
A memory cell is accessed by selecting the word and bit lines to which that cell is connected. Selecting the corresponding word line causes the access transistor to turn on, and selecting the corresponding bit line allows current to flow to the corresponding ferroelectric capacitor. For example, a first polarization state can be written to the ferroelectric capacitor by driving the selected bit line high and the plate line low, and a second polarization state can be written to the capacitor by driving the plate line high and the selected bit line low. A polarization state can be read from the ferroelectric capacitor by turning on the selected word line and sensing charge on the selected bit line.
Whether or not the FeRAM eventually replaces with flash memory will depend upon factors such as size and cost of the FeRAM device, reliability of the FeRAM device, and reproducibility of the FeRAM device.
One objective of FeRAM design is to increase packaging density of the FeRAM device. Since memory cell density has a direct influence on chip cost, increasing the packaging density would reduce chip cost.
Another objective is to reduce cross talk between the bit lines. When data is accessed from a typical FeRAM device in m-bit words, multiple bit lines are accessed simultaneously. The signal on the bit lines is smaller than on the word lines. The resulting signal-to-noise ratio on the bit lines can present problems. Reducing the cross talk would increase reliability of accessing data from the memory cells.
Yet another objective is to reduce the number of elements on the FeRAM device. Reducing the number of elements can also reduce size and cost of the chip. Reducing the number of elements can also increase reproducibility of the device for high volume manufacture.